发明名称 COMPUTER OPERATION TIME CONTROL DEVICE
摘要 <p>PURPOSE:To improve operability by sending out an operation control signal related to the execution of each instruction from a computer, to an operating part, receiving its signal, and delaying an operation speed of the computer by a desired time. CONSTITUTION:A stop signal generating circuit 9 is provided on an operating part which as been separated from a computer 1 having a CPU 3 and a two input OR circuit 11, a shift register 13 for receiving a shift use clock signal from the circuit 11 is constituted by cascading shift register stages 17, 19, 21 and 23, and the circuit 9 is constituted by providing a selecting circuit 15 by which a changeover switch 15a can be connected to fixed contacts 15c-15f. Also, the switch 15a can be connected to a fixed contact 15b of an earth connection, and a fixed contact 15g of a high voltage connection, its output is connected to the stages 17, 19, 21 and 23 through inverters 29, 31, and a delay signal which has switched the contacts 15c-15f and a stop signal which has been connected to the contact 15g are sent to the CPU 3.</p>
申请公布号 JPS6226541(A) 申请公布日期 1987.02.04
申请号 JP19850165685 申请日期 1985.07.29
申请人 TOSHIBA CORP;TOSHIBA AUDIO VIDEO ENG CORP 发明人 OURA SEIETSU;MIMURA HIDENORI
分类号 G06F9/30;G06F1/04 主分类号 G06F9/30
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