| 摘要 |
A semiconductor memory device comprising redundancy memory elements for functionally replacing defective memory elements, redundancy circuits for operating said functional substitution of the redundancy memory elements for the defective memory elements, and operation mode control circuits for controlling the memory device to operate according to a plurality of operation modes, said plurality of operation modes comprising a memory read mode and redundancy test modes for testing the redundancy circuits. The memory device comprises an internal shared bus of signal lines that when the memory device is operated in said read mode is used to transfer read data signals to output terminals of the memory device and when the memory device is operated in one of said redundancy test modes is used to transfer redundancy signals, depending on the redundancy test mode, to the output terminals of the memory device.
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