发明名称 AUTOMATIC ADJUSTMENT SYSTEM FOR TIMING
摘要 <p>PURPOSE:To adjust the timing of the control system of a computer system, etc., by determining a suitable output terminal for obtaining a specific delay time among respective delay times of output terminals of a delay circuit which differ in delay time. CONSTITUTION:A measurement signal generating circuit 14 is actuated when necessary to send out an 'on' signal to a signal line 18 for a certain time. Consequently, when output lines 12-1-12-7 of the delay circuit 11 to which the signal A of a signal line 10 is inputted turn on, a latch circuit 15 sets a latch corresponding to the output line on. A processor 16 calculates the man delay time of the respective output lines 12-1-12-7 from on/off states of latches and the prescribed 'on' time of the on signal of the signal line 18 and compares the mean delay time with a predetermined prescribed delay time to determine an output line through which an optimum delay time is obtained, thereby setting a selecting circuit 13 so that the output line is selected.</p>
申请公布号 JPS6225311(A) 申请公布日期 1987.02.03
申请号 JP19850164469 申请日期 1985.07.25
申请人 FUJITSU LTD 发明人 TARUSAWA KUNIAKI
分类号 G06F1/06;G06F1/04 主分类号 G06F1/06
代理机构 代理人
主权项
地址