| 摘要 |
A multi-phase PSK (phase shift key) demodulator is applied to recover a binary encoded serial data from a continuous multi-phase modulated signal source. This demodulator mainly comprises a carrier detect, a hard limiter, a harmonic phase-locked clock regenerator, a digital multi-phase demodulator, a data clock divider and a reference phase synchronizer. The digital multi-phase demodulator applies the output of the harmonic phase-locked clock regenerator and N-th phase rectangular wave PSK signal to produce a demodulated binary encoded parallel data. Then the demodulated parallel data is converted into a serial data via a parallel to serial converter. The reference phase synchronizer can obtain a reference signal through the information of the leader preamble or continuous distributed sync words. Thus a retransmission is not required for phase resynchronization. The regeneration of carrier related clock signal and data demodulation are independent of data pattern if the input signal is preemphasized or conditioned.
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