发明名称 PULSE DELAY CIRCUIT
摘要 PURPOSE:To eliminate the need for readjustment of a delay time with every change of the period of a delayed pulse by changing automatically the delay time proportional to the period of the pulse to be delayed. CONSTITUTION:Suppose that a synchronizing signal (a) is decreased from a period T into a period T', an integration voltage (e) starts moving higher, an output voltage (f) of an operational amplifier 3 starts increasing, a charging current to a resistor R1 and a capacitor C1 is increased and the charging time is reduced, then the width (t) of an output pulse (b) is decreased into the width t'. When the width of the output pulse (b) is decreased, the integration voltage (e) is decreased, resulting that the integration voltage (e) kept nearly to a reference voltage 4. The change in the integration voltage (e) is smaller as the gain of the operational amplifier 3 is larger and zero when the gain is infinite. Then, the duty of an output pulse (b) is nearly constant, that is, the relation of (t/T (t'/T) exists regardless of the period T of the synchronizing signal (a). Thus, the output (b) is differentiated by a differentiation circuit 5 and a delay pulse (d) subject to waveform shaping by a waveform shaping circuit 6 is retarded in a uniform ratio against the period of the synchronizing signal (a).
申请公布号 JPS6223225(A) 申请公布日期 1987.01.31
申请号 JP19850163372 申请日期 1985.07.23
申请人 MATSUSHITA ELECTRIC IND CO LTD 发明人 IWASHITA MASAHARU;KAWAMOTO TETSURO;SEGAWA KAZUTOSHI;YAMAMURA SOHEI
分类号 H03K5/13 主分类号 H03K5/13
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