发明名称 SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE
摘要 PURPOSE:To improve electric reliability, by forming the third field effect transistor, which connects an external terminal and a drain region, with the same structure as that of the first field effect transistor, thereby suppressing fluctuation in time in threshold voltage. CONSTITUTION:In an input circuit of an EPROM, an electrostatic-breakdown preventing circuit II is provided between an external input terminal BP and an input stage circuit I, which is an internal circuit. The input stage circuit I is constituted by an inverter circuit comprising an N-channel MISFETQn and a P-channel MISFETQp. The electrostatic-breakdown preventing circuit II is constituted by a protecting resistor element R and a clamping MISFETQc. The MISFETQc is composed of a field effect transistor having a floating gate electrode and a control gate electrode. The drain region of the MISFETQc is connected to the external input terminal BP and the input stage circuit I. The source region, the floating gate electrode and the control gate electrode are connected to a reference voltage Vss. The MISFETQc is constituted with the same structure as that of the field effect transistor of a memory cell.
申请公布号 JPS6220376(A) 申请公布日期 1987.01.28
申请号 JP19850158147 申请日期 1985.07.19
申请人 HITACHI LTD 发明人 KURODA KENICHI
分类号 G11C17/00;G11C16/06;H01L21/8246;H01L21/8247;H01L27/02;H01L27/10;H01L27/112;H01L27/115;H01L29/788;H01L29/792 主分类号 G11C17/00
代理机构 代理人
主权项
地址