CONTROL CIRCUIT OF INTEGRATED CIRCUIT

摘要

PURPOSE:To reduce frequencies of clock signals distributed to individual microprocessors by inputting a single pulse to generate control pulses in an integrated circuit by gate delay logic circuits. CONSTITUTION:A clock (c) with a one-cycle time as the period is inputted to an input pin 1 of an integrated microprocessor M. An internal clock (d) is obtained as the output signal of an inverter aN by propagation delay of inverter groups a1, a2,...aN. Internal clocks (e) and (f) are obtained similarly by inverter groups b1, b2,...bN and c1, c2,...cN. The clock (c) and internal clocks (d), (e), and (f) are allowed to pass logic circuits (NOR gates) aNOR, bNOR, and cNOR to obtain control pulses, and these control pulses are led to a control circuit 2. The control circuit 2 controls circuits like an operating circuit 3.