发明名称 SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE
摘要 <p>PURPOSE:To speed up operation by providing a cut-off MOSFET between a load MOSFET and a drive MOSFET constituting a logic circuit. CONSTITUTION:The cut-off MOSFET Q21 is provided between the drive MOSFET Q22 and the load MOSFET Q23, and the drive MOSFET directly extracts a low-level voltage from the high-level voltage of the input node potential of a level converter circuit to make the extracted voltage an output signal to convert a signal of comparatively low level formed by the logic circuit to the one of high level. Accordingly, the delay time of the propagation of the signal, such as level-extraction through the cut-off MOSFET Q21 does not occur. As a result, the operation is speedified.</p>
申请公布号 JPS6220200(A) 申请公布日期 1987.01.28
申请号 JP19850158131 申请日期 1985.07.19
申请人 HITACHI LTD 发明人 FURUNO TAKESHI;FUKUDA MINORU;MATSUNO YOICHI
分类号 G11C17/00;G11C16/06 主分类号 G11C17/00
代理机构 代理人
主权项
地址