发明名称 Power transistor structure having an emitter ballast resistance
摘要 In a semiconductor device a power transistor is equipped with a ballast resistance formed in the same semiconductor layer which forms the emitter regions which perform the bipolar transistor operation. Due to this ballast resistance and an electrode extension portion also formed in the emitter semiconductor layer, an undesirable parasitic transistor is also formed in the semiconductor device. This parasitic transistor is comprised of an emitter formed by the ballast resistor and the electrode extension portion, and the base and collector regions of the bipolar transistor layers which are immediately below the ballast resistor and the electrode extension portion. Accordingly, means are disposed in the layer forming the base region for reducing the current gain of the parasitic transistor. This current gain reducing means can include either an expanded width base portion or a higher impurity concentration base portion in the parasitic transistor region.
申请公布号 US4639757(A) 申请公布日期 1987.01.27
申请号 US19810329948 申请日期 1981.12.11
申请人 HITACHI, LTD. 发明人 SHIMIZU, ISAO
分类号 H01L21/331;H01L29/08;H01L29/72;H01L29/73;(IPC1-7):H01L29/72;H01L23/48;H01L27/02 主分类号 H01L21/331
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