| 摘要 |
An apparatus for selectively switching between either of two RF clock signal sources utilizes field effect transistors (FET's) as the switching elements. The FET's are driven at their respective base electrodes by complementary signals from open collector logic gates to provide signal source selection. In the event of loss of power to the RF switch, the energy from the RF signal passing through the previously selected switch path provides a positive (enabling) bias to the FET's in that path and a negative (disabling) bias to the FET's in the other path, thereby maintaining the selected path. The open collector logic gate circuits appear as open circuits when power is lost. During normal powered-on operation, the selection logic overrides the RF signal energy biasing circuits.
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