An array testing apparatus includes a plurality of pin pattern generators for individually generating serial bit sequences required at each pin of a device under test during the testing operation. The individual pin pattern generators receive starting addresses from one or more programmable controllers and each pin pattern generator then performs a subroutine to repeat basic patterns or combinations of basic patterns as necessary. Both the pin pattern generators and the programmable controllers may include loop logic for obtaining the desired repetition sequences.
申请公布号
US4639919(A)
申请公布日期
1987.01.27
申请号
US19830564853
申请日期
1983.12.19
申请人
INTERNATIONAL BUSINESS MACHINES CORPORATION
发明人
CHANG, YI-HUA E.;GRUODIS, ALGIRDAS J.;MUHLFELD, JR., HANS P.;RODRIGUEZ, CHARLES W.;SHULMAN, MARK L.