| 摘要 |
<p>PURPOSE:To reduce the number of circuits and a chip area by permitting a detecting means to compare sequentially an electrode output level at the other side of each FET with the output level of a reference level signal generating means and detecting the difference between electrode output level at the other side of respective FETs. CONSTITUTION:A source potential switching circuit 7 is connected to the source of a memory transistor 11, which is of a quaternary level type transistor and has any one threshold voltage among four types of threshold voltages. The source potential of the transistor 11 is switched at three-staged levels by a source potential switching signal 7a, and the level of an output signal 11a is changed. A reference level signal generator 6 generates a reference level signal 1a having three-staged levels with the aid of control signals 32a and 33a. A sense amplifier 12 compares the level of the output signal 11a of the memory transistor 11 with that of a reference level signal 6a, amplifies and converts them into a signal at a binary level and outputs sense amplifier signals 12a and 12b out of one output side and the other one, respectively.</p> |
