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发明名称
METHOD FOR FORMING TEST PATTERN FOR CIRCUIT CONTAINING VARIABLE LOGIC
摘要
申请公布号
JPS6217667(A)
申请公布日期
1987.01.26
申请号
JP19850156230
申请日期
1985.07.16
申请人
FUJITSU LTD
发明人
ONO FUMIO
分类号
G01R31/28;G01R31/3183
主分类号
G01R31/28
代理机构
代理人
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地址
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