| 摘要 |
PURPOSE:To apply electric stress effectively by inputting a specific binary signal to bidirectional data buses consisting of plural terminals in a microprocessor through 1KOMEGA-1MOMEGA serial resistors, and when the signal coincides with a stop instruction, resetting the signal. CONSTITUTION:A signal from a clock pulse generating circuit 2 is applied to 12 binary counters 3 connected successively and a binary signal is formed by reducing its frequency into a half successively and inputted to the microprocessor 1 through 1KOMEGA-1MOMEGA serial resistors and the bidirection data buses D7-D0 in the microprocessor 1. Signals outputted from the counters 3 are inputted to a NAND circuit 4 for a reset signal generating circuit, and only when a stop instruction is outputted from a certain counter 3, a reset signal is outputted to the processor 1. Thus, even if the processor 1 is stopped due to malfunction, the processor 1 can be reset during the circulation of the input signal. |
