| 摘要 |
<p>PURPOSE:To prevent the delay of a propagation delay time by connecting resistances and diodes having one ends connected to a power source Vcc to all sequence lines. CONSTITUTION:When an output of a line selecting circuit G3, namely, a line X1 as shown in phi5, changes from L level to H level, the current of resistance R1 and R5 does not flow into the line selecting circuit G3. Therefore, the current of the resistance R5 is supplied as a charging current of a parasitic capacity existing in a sequence line Y1 and the current of the resistance R1 is supplied as the charging current of the parasitic capacity existing in the sequence line Y1 and the node N1. The sequence line Y1 rises from the level of [V(G3)+Vf] and the node N1 rises from the level of [V(G3)+2Vf]. When the node N1 reaches to the level required for moving an output terminal O1 of an output circuit OC 1 from H level to L level, the current of the resistance R1 is not supplied to the parasitic capacity. The current of the resistance R1 flows into the output circuit 1 and the output terminal O1 is changed to the L level.</p> |
