发明名称 Semiconductor memory address lines with varied interval contact holes
摘要 According to a memory of the invention which can read/write data, word lines are connected to memory cells arranged on a semiconductor substrate. Each word line has a double layered structure comprising first and second conductive lines. An insulative layer is sandwiched between the conductive lines. Since the insulative layer has a plurality of contact holes formed along the extended direction of the first and second lines and spaced by an irregular pitch, the stacked lines are discontinuously and electrically connected to each other through these contact holes.
申请公布号 US4638458(A) 申请公布日期 1987.01.20
申请号 US19850715360 申请日期 1985.03.25
申请人 KABUSHIKI KAISHA TOSHIBA 发明人 ITOH, YASUO
分类号 G11C11/401;G11C11/40;H01L21/3205;H01L21/8242;H01L23/52;H01L23/528;H01L27/10;H01L27/108;(IPC1-7):G11C5/10 主分类号 G11C11/401
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