发明名称 |
Video analyzer and video error detector |
摘要 |
Since a delaying part ( 14 ) delays transmission of a video signal, the timing at which a decoded video signal is input into a multiplex processing part ( 16 ) matches the timing at which an analysis result from an encoded information analyzing part 13 is received by the multiplex processing part ( 16 ). It is, therefore, possible to perform processing for showing the quality level of a video on the same screen, and thus a large capacity memory is unnecessary. |
申请公布号 |
US2005168590(A1) |
申请公布日期 |
2005.08.04 |
申请号 |
US20040505067 |
申请日期 |
2004.08.18 |
申请人 |
KDDI MEDIA WILL CORPORATION |
发明人 |
TAKIZAWA NARUO;KONNO HIROYUKI;HAMADA TAKAHIRO;ICHIGAYA ATSURO;NAKASU EISUKE |
分类号 |
H04N5/228;H04N7/24;(IPC1-7):H04N5/228 |
主分类号 |
H04N5/228 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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