Process for fabrication of a planar heterostructure

摘要

The heterostructure has a wafer (3) etched from an upper main surface of a semiconductor substrate. A stack of alternative silicon germanium layers (5, 7) and silicon layers (6, 8) is deposited on the surface and walls, where the number and thickness of the stack depends on final utilization for the heterostructure. The final heterostructure has a plane upper main surface, where the layers project at the level of the plane surface. The former surface is coated with a resin mask by photolithography process which takes place outside active regions of the heterostructure. An independent claim is also included for a method for fabricating a planar heterostructure.