| 摘要 |
A gallium arsenide differential line receiver circuit has a first and second receiver means for receiving first and second differential input signal voltages. A pair of depletion transistor means for transforming the signal voltages into corresponding signal currents provides pull-up, and the depletion transistors have their gates operatively connected to the first and second receiver means. A pair of enhancement transistor means is operatively connected to the pair of depletion transistor means for outputting a gallium arsenide signal representation of the first and second differential input signal voltages. Positive feedback is provided for increasing the gain of the pair of enhancement transistors and is operatively connected to the pair of enhancement transistors. Shunting means is also provided for reducing hysteresis switching and is operatively connected to the pair of enhancement transistors.
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