发明名称 TEST PATTERN GENERATOR
摘要 PURPOSE:To facilitate the easy generation of a test pattern and at the same time to secure the synchronization between the execution of an instruction and the test pattern, by describing a test pattern applied to an IC to be tested and a program which actuates said IC opposite to each other. CONSTITUTION:A test pattern applied to an IC 8 to be tested is described to a pattern field 92 of a source file 9 by an amount equal to the number of instruction executing clocks. The file 9 is supplied to an input control means 1 and converted into an internal formation. The means 1 supplies the number of rows of the instruction to be executed next from a simulator 2 and delivers data in a format equal to a pattern field 92. The means 3 reads the number of instruction executing clocks out of the simulator 2 and writes it to a pattern storage device 4 after the format conversion. An output control circuit 6 supplies the data on the device 4 and applies the data to the corresponding terminal of the IC 8.
申请公布号 JPS626339(A) 申请公布日期 1987.01.13
申请号 JP19850146023 申请日期 1985.07.03
申请人 MATSUSHITA ELECTRIC IND CO LTD 发明人 MIYAZAKI MASAYA
分类号 G06F11/22;G01R31/28 主分类号 G06F11/22
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