发明名称 SOI TYPE HIGH WITHSTAND VOLTAGE IC
摘要 PURPOSE:To increase the withstand voltage by forming an N<+> type high density region in a P-type semiconductor substrate directly under a drain diffused layer of a high withstand voltage transistor, forming an N<-> type low impurity density region in the offset gate region of the periphery of the region, and connecting the high density region with the drain region. CONSTITUTION:An N<+> type diffused region 12 is formed on a region corresponding to the portion formed with a drain region 3 of a P-type silicon substrate 1, and an N<-> type region of low impurity density is formed at the periphery. A silicon oxide film 2 is formed as an insulating film, the oxide film on an N<+> type region 12 is opened to form a polycrystalline silicon. Thereafter, boron is implanted to the semiconductor layer to form a P-type semiconductor layer, phosphorus is further diffused to form a drain 3 and a source 4. Then, a gate oxide film 5 is formed, a region 11 is formed by a phosphorus ion implanting method, a polycrystalline silicon is formed as a gate 6. Then, aluminum is deposited to form electrodes 9, 10. Thus, even if an insulating film is reduced in thickness, the concentration of an electric field does not occur to obtain a transistor having high drain withstand voltage.
申请公布号 JPS625662(A) 申请公布日期 1987.01.12
申请号 JP19850145046 申请日期 1985.07.01
申请人 NEC CORP 发明人 SAITO MIKIKO
分类号 H01L29/78;H01L21/336;H01L27/12;H01L29/786 主分类号 H01L29/78
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