发明名称 DATA ENCODING/RECODING CIRCUIT
摘要 In a data encoding/decoding circuit, a data encoding circuit includes a first clock, a first time setting circuit, a first random number generator, and a converter for receiving transmission data and converting the transmission data into output data with frame sync signals. A data decoding circuit includes a second clock, a second time setting circuit, a frame sync extracting circuit, a time correction circuit for correcting the time of the second clock, a second random number generator, and an inverter for inverting output data from the frame sync extracting circuit with a random number from the second random number generator and outputting the inverted data as decoded data.
申请公布号 AU5916286(A) 申请公布日期 1987.01.08
申请号 AU19860059162 申请日期 1986.06.24
申请人 NEC CORP. 发明人 TOSHIFUMI SATO
分类号 H04L9/06;H04L9/12;H04L9/14;H04L9/18;H04L9/20 主分类号 H04L9/06
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