| 摘要 |
<p>PURPOSE:To prevent an external terminal from largely increasing by controlling the second pulse formed on the basis of a pulse by a selector by detecting means of the presence or absence of a clock pulse to transmit to a frequency divider. CONSTITUTION:When a control circuit is tested in operation by a tester, power source voltage pair (-VDD) become negative by turning ON the power source, and a negative voltage is simultaneously applied to a resistor terminal P. The terminal P becomes ''1'', and since the input of a latch circuit 4 is ''1'' through an inverter IN, an output Q becomes ''0'' by an autoclear signal ACL. An AND circuit G2 produces an output ''0'', a NOR circuit G1 outputs an inverted signal of the output of an oscillator 2, a frequency divider 6 form clock pulses phi1, phi2 on the basis of the pulse signal from the oscillator 2. Then, when a pulse is input from a tester to the terminal P, the pulse signal is applied to the divider 6. Accordingly, the tester and the timing pulse of the control circuit for testing are synchronized.</p> |
