| 摘要 |
PURPOSE:To prevent the generation of a soft-error while remarkably reducing the capacitance of a bit line by forming a MOS field-effect transistor constituting a memory-cell onto a substrate through an insulating film and insulating and isolating an information-charge storage section and the bit line from the substrate. CONSTITUTION:A field oxide film 2 is shaped to an Si substrate 1, an SiO2 film 4 is grown through thermal oxidation, a poly Si film is deposited on the whole surface, boron is doped, a pattern is formed, and boron is recrystallized through laser-annealing. A gate oxide film 8 is grown through thermal oxidation, a poly Si film is deposited, a pattern is shaped, a transfer gate 9 is formed, and phosphorus is doped to the whole surface to shape a storage a gate 5 and a bit line 7. An SiO2 film is deposited, an inter-layer insulating film 3 is formed, a contact-hole is bored, and a metallic wiring 10 is shaped. |
