发明名称 FORMING METHOD FOR SEMICONDUCTOR RESISTANCE ELEMENT
摘要 PURPOSE:To prevent oxidation on the diffusion of a base and an emitter, and to stabilize a resistance value by implanting ions through a thermal oxide film and an silicon-nitride film before the diffusion of the base and forming a resistance element. CONSTITUTION:SiO3N4 12 deposited on SiO2 11 is patterned, and oxidized selectively. A resistance element is patterned, and an oxide film is wet-etched. Ions having high concentration and low implantation energy are implanted in the state, thus shaping a P<+> layer 14 for an electrode section. Ions having low concentration and high implantation energy are implanted by using implantation energy capable of masking in the thickness of a thermal oxide film and the thickness of an Si3XN4 film at that time, thus forming a P<-> layer 15 determining a resistance value. Ions are implanted, the whole is annealed, a base is diffused and an emitter is diffused, the emitter is shaped, a CVD film 16 is deposited, a window for leading out an electrode is bored, and a metallic wiring 17 is formed.
申请公布号 JPS621259(A) 申请公布日期 1987.01.07
申请号 JP19850141224 申请日期 1985.06.26
申请人 SHARP CORP 发明人 TSUDA KATSUNORI
分类号 H01L27/04;H01L21/822;H01L29/8605 主分类号 H01L27/04
代理机构 代理人
主权项
地址