PROGRAMMABLE DECIMATOR APPARATUS AND METHOD FOR SCALABLE BANDWIDTH

摘要

A decimator apparatus and a method thereof are provided to regularly maintain a filter factor of a channel filter by outputting data at a fixed speed or magnification. A clock generator(220) receives a first control signal from a control part. The clock generator generates a second control signal and an ADC(Analog-Digital Converter) clock suitable for a channel bandwidth. The clock generator outputs the ADC clock to an ADC. The second control signal is outputted to a down sampler. The down sampler(210) down-samples an input data from the ADC according to the second control signal, and outputs the down-sampled data.