发明名称 STORAGE DEVICE
摘要 PURPOSE:To facilitate test pattern forming of a storage device and to attain designation of order of a special address by providing an external address input circuit selecting one of plural external address inputs with a selection signal. CONSTITUTION:External address input circuits 4, 5 are connected to a decision circuit 3, transistors (TRs) 6, 8 or TRs 7, 9 connected in series are provided respectively in the external address input circuits 4, 5, selection signals A, B are inputted to each gate of the TRs 6, 7 and external address inputs Ai, Aj are inputted to each gate of the TRs 8,9 respectively. In the input decision of the address, when the mode is selected by the changeover of the TRs 6, 7 functioning as an address selection circuit and the mode A is selected by the selection signal A, the external address input Ai is selected by the decision circuit 3, and when the mode B is selected by the selection signal B, the external address input Aj is discriminated.
申请公布号 JPS61296600(A) 申请公布日期 1986.12.27
申请号 JP19850137166 申请日期 1985.06.24
申请人 NEC IC MICROCOMPUT SYST LTD 发明人 UEDA TADAYUKI;IKEDA HIROAKI
分类号 G11C7/00;G11C8/00;G11C29/00;G11C29/10;G11C29/12 主分类号 G11C7/00
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