| 摘要 |
PURPOSE:To attain highly accurate D/A conversion without increasing a chip size by including a charge transfer means and a charge selection means and generating a signal having a level in response to the output charge quantity of the charge selection means. CONSTITUTION:In applying a control voltage by the 2-phase drive system to electrodes G1-G34, an electric charge Q in response to the voltage applied to the source region 1 is injected to a transfer section 2a and transferred to a branch section 2b. When the areas overlapped by transfer sections 2c, 2d and the electrode G8 are equal, the electric charge transferred to the branch part 2b is divided equally into two and the electric charge of Q/2 is sent to the transfer sections 2c, 2d. The similar action is exerted to branch sections 2e, 2j and the electric charges of Q/8, Q/4, Q/2 are transferred respectively to selection output sections 2m-2p. When bits b1-b3 of a digital data D are logic 1, the switch formed on each subcarrier line of the selection output sections 2m-2p is turned off and all electric charges are transferred to a drain region 3 via a main carrying path.
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