| 摘要 |
PURPOSE:To attain the communication between processors via a port memory by providing a conflict circuit which arbitrates the access conflict between a common bus and an idividual bus and the port memory which receives accesses from both buses. CONSTITUTION:A host processor 1 is connected to an individual memory 2 of the processor 1 via an individual bus 100. Then the bus 100 is connected with a common bus 300 via a bus interface 5. While a slave processor 3 is connected to an individual memory 4 of the processor 3 via an individual bus 200. The bus 200 is connected with the bus 300 via a bus interface of the processor 3. A conflict circuit 7 arbitrates the conflict between the access requests of processors 1 and 3 to a port memory 8 respectively.
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