| 摘要 |
PURPOSE:To improve the degree of integration by constituting a logic array on a CMOS integrated circuit by the plane of a P channel transistor array, the plane of an N channel transistor array and the plane of an output array. CONSTITUTION:All combination logics can be developed to a main addition standard form, and all combination logics can be constituted from one AND- NOR composite gate and inverters. Since the AND-NOR composite gate consists of a CMOS, the structure of the P channel transistor side is complemented to an N channel transistor, the AND of a logic constituting an N channel transis tor group is converted mechanically into OR and OR into AND, and AND or OR is deformed to the form of the sum of products and can be applied to a P channel transistor group. Consequently, when some combination logic must be realized, polysilicon and a contact hole are shaped where requiring the transistor, a mask through which a means electrically conducting the neces sary position of an output line group with a diffusion layer is provided is added, and polysilicon may be processed. Accordingly, the degree of integration is improved while a program can be facilitated. |
