发明名称 |
Error correcting and detecting system |
摘要 |
An error correcting and detecting system using a parity check H-matrix divided into a plurality of block vectors each including four or three column vectors each having eight elements. In the H-matrix, (i) there are no all "0" vectors; (ii) all column vectors are different from each other; (iii) 8 column vectors each having only one "1" is included therein, (iv) each column vector has an odd number of "1's"; (v) the modulo-2 sum of any three column vectors within any block never equals any column vectors of the H-matrix; (vi) the modulo-2 sum of four column vectors within any block never equals an all "0" vector; and (vii) the modulo-2 sum of eight column vectors within any two blocks never equals an all "0" vector.
|
申请公布号 |
US4631725(A) |
申请公布日期 |
1986.12.23 |
申请号 |
US19840686815 |
申请日期 |
1984.12.27 |
申请人 |
FUJITSU LIMITED |
发明人 |
TAKAMURA, MORIYUKI;MUKASA, SHIGERU;IBI, TAKASHI |
分类号 |
G06F11/10;H03M13/00;H03M13/19;(IPC1-7):G06F11/10 |
主分类号 |
G06F11/10 |
代理机构 |
|
代理人 |
|
主权项 |
|
地址 |
|