| 摘要 |
PURPOSE:To enhance the recognized resolution without loss of a responsiveness by selecting a frequency command recognizing circuit having a short counting period or a frequency command recognizing circuit having a long counting period in response to a deviation value between an inner frequency command signal and an inverter output command signal. CONSTITUTION:The output signal of a voltage/frequency converter 10 is applied to frequency command recognizing circuits 6A, 6B. When a deviation value between an inner frequency command signal and an inverter output command signal is within the prescribed range, the output of the recognizing circuit 6A having many counted values of a counter and a long counting period is supplied to a frequency delay circuit 40, and when the deviation is out of the range, the output of the recognizing circuit 6B having less counted values of the counter and a short counting period is supplied to the delay circuit 40. The delay circuit 40 outputs in inverter output command.
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