| 摘要 |
PURPOSE:To make a design optimum by a method wherein a junction type FET active layer and a PIN photodiode light receiving layer are respectively formed by means of vapor growth process. CONSTITUTION:A semi-insulating InP substrate 21 is etched to form a step difference part and an N type In0.53Ga0.47As layer 22 containing around n1=1X 10<15>cm<-3> of Si etc. is vapor grown on overall surface. Firstly an In0.53Ga0.47As layer 22 grown on the surface of the higher step difference part is removed by etching process to flatten the overall surface. Secondly another N type In0.53 Ga0.47As layer 23 containing around n2=5X10<15>cm<-3> of Si etc. as a semiconductor layer containing carrier concentration of n2(n2>n1) higher than the carrier concentration of n1 is vapor grown. Thirdly a P type impurity such as Zn etc. is diffused to form a P type diffusion region 24 reaching the InP substrate 21 and then P type shallow regions 251, 252 are formed. Finally Au/Su/Au layers 26 and Au layer 27 are formed into electrodes to be coated with polyimide layers 28. Through these procedures, the carrier concentrations of a junction type FET active layer and a photodiode light receiving layer may be designed respectively and independently. |
