| 摘要 |
PURPOSE:To inverse an LSB and an MSB at a high speed by providing a multiplexer which supplies data to a memory directly or with inversion of the LSB and the MSB and another multiplexer which outputs data directly or with inversion. CONSTITUTION:The data on a data bus 12 is written to a memory 10 at an address designated by an address bus 11. While a multiplexer which works with a selection signal S1 of a controller 3 switches selectively an input A to receive the data on the bus 12 as it is and an input B to receive an LSB and an MSB with inversion and writes them to the memory 10. In a read mode, a multiplexer 2 which works with a selection signal S2 switches selectively an output (1) to receive the data of the memory 10 as it is and an output (2) to receive the data with inversion of the LSB and MSB and outputs them to the bus 12. |
