发明名称 INPUT/OUTPUT PROCESSING SYSTEM
摘要 PURPOSE:To raise the processing efficiency of a channel subsystem and the whole system by suppressing a memory access for referring to and updating a subchannel by the channel subsystem, in case of the operation control of an input/output device. CONSTITUTION:Two bits of an operating mode bit MP and a connecting mode bit MAD are provided in input/output processors 14-1, 14-2. When executing a command chain from a combination of these bits, whether a continuous operation is executed, based on a subchannel 13 in a main storage device 100, or the continuous operation is executed, based on subchannels 13', 13'' in the device 14-1 or 14-2 is decided, and the number of times of an access to the storage device 100 is minimized. In this way, the time extending from the reception of a reconnecting request to the continuation of the operation is curtailed, and also the number of times of an access of the main storage device 100 of the channel subsystem is suppressed, by which the processing capacity of the whole system can be improved.
申请公布号 JPS61290558(A) 申请公布日期 1986.12.20
申请号 JP19850131790 申请日期 1985.06.19
申请人 HITACHI LTD 发明人 SATO KIICHI
分类号 G06F13/12 主分类号 G06F13/12
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