| 摘要 |
<p>PURPOSE:To handle the memory space of a large capacity by constituting a microprocessor so as to contain a segment register for holding an address, and so as to have the interchangeability of an instruction with an existing processor by adding the segment register and the instruction. CONSTITUTION:Segment register IS, DS, SS and CS, a temporary register TR, and a segment buffer SB are increased. At the time of each memory cycle, the contents of the corresponding to a segment register are outputted to external output terminals S0-7. Also, in order to operate these segment registers, a prescribed instruction is added. When a segment designating instruction is executed, a designated segment address is stored in the TR, and simultaneously, a flag is set. When executing the next memory reference instruction, this flag is tested, and if it is set, the contents of the TR are outputted instead of the contents of the corresponding segment register, and this flag is reset. Accordingly, the TR is outputted by only the next instruction of the segment designating instruction.</p> |
