发明名称 METHOD, APPARATUS, SYSTEM FOR CENTERING IN A HIGH-PERFORMANCE INTERCONNECT
摘要 In an example, a system and method for centering in a high-performance interconnect (HPI) are disclosed. When an interconnect is powered up from a dormant state, it may be necessary to "center" the clock signal to ensure that data are read at the correct time. A multi-phase method may be used, in which a first phase comprises a reference voltage sweep to identify an optimal reference voltage. A second phase comprises a phase sweep to identify an optimal phase. A third sweep comprises a two-dimensional "eye" phase, in which a plurality of values within a two-dimensional eye derived from the first two sweeps are tested. In each case, the optimal value is the value that results in the fewest bit error across multiple lanes. In one example, the second and third phases are performed in software, and may include testing a "victim" lane, with adjacent "aggressor" lanes having a complementary bit pattern.
申请公布号 WO2016105862(A1) 申请公布日期 2016.06.30
申请号 WO2015US62855 申请日期 2015.11.28
申请人 INTEL CORPORATION 发明人 WAGH, MAHESH;WU, ZUOGUO;IYER, VENKATRAMAN;PASDAST, GERALD S.;HINCK, TODD A.;LEE, DAVID M.;LANKA, NARASIMHA R.
分类号 G06F11/16;G01R19/165;G01R23/12;G06F11/22 主分类号 G06F11/16
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