发明名称 DIGITAL SIGNAL PROCESSOR
摘要 PURPOSE:To reduce the number of instructions required for data processing in a microprocessor by executing data array conversion such as the insersion of interpolation data in a sequential mode. CONSTITUTION:At the formation of addresses of respective cells in a large capacity memory 1 by a memory control unit, these addresses can be successively decreased in the sequential mode. On the other hand, the addresses can be also formed with offsets for resultantrily sequential address formation in the sequential mode by an MCU 2. One bit of a flag set up at the return of the address of each cell from its end address to its start address is supplied to the microprocessor 3 side. Since a pointer can be successively advanced with 2 or more offsets, data processing such as the insertion of interpolation data can be efficiently executed by a small number of instructions in the sequential mode.
申请公布号 JPS61289439(A) 申请公布日期 1986.12.19
申请号 JP19850130841 申请日期 1985.06.18
申请人 SONY CORP 发明人 IMURA SHIGERU
分类号 G10H1/00;G06F12/00;G06F12/02;G06F17/17 主分类号 G10H1/00
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