发明名称 半導体試験治具およびそれを用いた半導体試験方法
摘要 A semiconductor testing jig fixes a measurement target while it is held between a chuck stage and the measurement target. The semiconductor testing jig includes a base on which the measurement target is to be installed and which can be attached to the chuck stage. The base includes: a first main surface to become an installation surface for the measurement target; a second main surface opposite the first main surface and which is to contact the chuck stage; and a porous region containing a porous member. The porous region is provided selectively as seen in plan view, and penetrates through the base from the first main surface toward the second main surface.
申请公布号 JP5943742(B2) 申请公布日期 2016.07.05
申请号 JP20120150077 申请日期 2012.07.04
申请人 三菱電機株式会社 发明人 秋山 肇;岡田 章;山下 欽也
分类号 H01L21/683;G01R31/26;H01L21/66 主分类号 H01L21/683
代理机构 代理人
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