| 摘要 |
PURPOSE:To prevent disturbance of a clock signal to an analog circuit by arranging the 1st resistor in parallel between an input and an output of an inverter composing of a MOS FET and arranging the 2nd resistor between an input terminal and the input of the inverter so as to generate a clock signal. CONSTITUTION:A feedback resistor 2 is arranged between the input and output of the inverter 1 and an input resistor 4 is arranged between the input terminal 3 and the input of the inverter 1. Supposing the inverter 2 is similar to an operational amplifier fixed by a switching voltage of the inverter 1 itself, then the amplification factor A of a signal converting circuit is nearly Rf/Rs, where Rf is a feedback resistor 2 and Rs is the input resistor 4. When a rectangular wave is given as the input, the output is a rectangular wave. Since the amplitude of the clock signal to a digital integrated circuit is made small, the harmonic of the signal is eliminated and the waveform is takes as a pseudo sinusoidal wave, the disturbance of a clock signal onto an analog circuit is avoided.
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