| 摘要 |
<p>PURPOSE:To omit a large scale peripheral circuit to be used for data transfer and to use low and high speed memories properly only by one processor by making a high speed processor directly access a low speed memory. CONSTITUTION:A CPU 1 accesses high speed memories (RAMs) 21, 22 in addition to a low speed memory 52 (e.g. EP-ROM). A circuit 10 is a clock generation control circuit. A memory map is constituted of the EP-ROM, a RAM1 and a RAM2 arrayed successively and a program is stored in the EP-ROM. The RAM1 is a copying area for the program and the RAM2 is used as data and work areas. A reset circuit 12, a power supply circuit 13, an I/O controller 11, and A/D and D/A converter 15 are connected as the periphery devices of the CPU1, but a program transfer circuit and a bus control circuit can be omitted.</p> |
