发明名称 MANUFACTURE OF SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE
摘要 PURPOSE:To form micro-structure isolating layers of different depths capable of high controllability in prescribed isolating regions in semiconductor elements by a method wherein grooves different from each other in depth are formed under a mask provided with openings different from each other in width for the application of the knowledge that the depth of etching is dependent upon the width of the mask opening in a reactive ion etching process. CONSTITUTION:An N<+> type imbedded layer 21 and then an epitaxial layer 22 is formed on an Si substrate 20, whereafter an SiO2 film 23, Si3N4 film 24, and a CVD-SiO2 film 25 are formed, in that order. A processes follows wherein openings of two different widths are provided in the lamination-forming films 23-25 and isolating grooves 26, 27 of two different depths are provided. A photoresist film 28 is formed in the groove 27 for the formation of a P<+> type channel stopper layer 29. The grooves 26, 27 are covered with an SiO2 film 30, whereafter a polycrystalline silicon film 31 is formed imbedded in the Si substrate 20. After this, an SiO2 film 32 is formed on the surfaces of the grooves 26, 27, which is followed by the formation of a P<+> type diffusion layer 33 and N<+> type diffusion layers 34, 35.
申请公布号 JPS61289642(A) 申请公布日期 1986.12.19
申请号 JP19850132326 申请日期 1985.06.18
申请人 MATSUSHITA ELECTRIC IND CO LTD 发明人 KAJIYAMA MASAOKI
分类号 H01L21/76 主分类号 H01L21/76
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