发明名称 CHANNEL CONTROL SYSTEM
摘要 PURPOSE:To drop a block rate at the time of setting a channel for high speed information by grasping selectively the same number of arbitrary idle output time slots as that of input time slots on a highway and corresponding the input time slots to the output ones so that the time order of the high speed information cannot be altered. CONSTITUTION:In a channel controller 2, an idle information control part 21, an output time slot grasp control part 22 and a time order guarantee part 23 are installed. The idle information control part 21 controls the idle state of each output time slot on an output highway HW0. The output time slot grasp control part 22 grasps selectively the prescribed number of arbitrary idle output time slots on the output highway HW0, and decides the correspondence to the input time slot. The time order guarantee part 23 shows the time order of each output time slot grasped by said part 22 and each input time slot. Namely, even if the input and output time slots transmitting high speed information are not continuously arranged, the time order of the high speed information will not be altered.
申请公布号 JPS61289794(A) 申请公布日期 1986.12.19
申请号 JP19850132511 申请日期 1985.06.18
申请人 FUJITSU LTD 发明人 SUGAWARA SUBEO;TSUBOI YOJI;SAKO CHISATO
分类号 H04Q3/52;H04Q11/04 主分类号 H04Q3/52
代理机构 代理人
主权项
地址