发明名称 PROCESSING SYSTEM FOR COMPARE AND SWAP INSTRUCTION
摘要 PURPOSE:To shorten the instruction execution time and to simplify a control circuit by providing an ECC circuit in a CPU and using the read modify write function of the ECC circuit to execute a compare and swap function in hardware. CONSTITUTION:Data is read out from a memory 20 and is set to a latch 10A. If an error exists in this data, it is corrected by a read data correcting circuit 10B; but otherwise, data is compared with data in a register REG(A) 27 by a comparing circuit 26 as it is. If this comparison results in coincidence, the contents of a register REG(B) are written in the memory 20 through a multiplexer MPX 30 and an aligner 10C. If the comparison does not result in coincidence, the data read from the memory 20 is written in the memory 20 through the latch 10A, the read data correcting circuit 10B, and the aligner 10C and is set to the register REG(A) 27.
申请公布号 JPS61288243(A) 申请公布日期 1986.12.18
申请号 JP19850131017 申请日期 1985.06.17
申请人 FUJITSU LTD 发明人 SUGIURA TAKUYA;SAKAI TOSHIHIRO
分类号 G06F12/16 主分类号 G06F12/16
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