发明名称 ARRANGEMENT STRUCTURE FOR INPUT/OUTPUT PIN OF IC PACKAGE
摘要 PURPOSE:To enable the input/output pins to be provided on both sides of the IC package to contribute to preventing the bad effect due to jamming of the electromagnetic wave from generating in the other circuits by a method wherein the arrangement structure of the input/ output pins is provided in an arrangement structure, wherein the first input/output pin and the second input/output pin are arranged adjacent to both sides of the input/output pin, whereto the ground is connected, to the input/output pin in such a way that the power current loops that link the ground to the first and second input/output pins are both formed into the shortest length. CONSTITUTION:The arrangement structure of input/output pins 8-21 to be provided on both sides of the package 7 of an IC chip 1, whereto two kinds of power sources 3 and to be needed for the operation of the IC chip 1 and the ground constituting the source power source common to both the power sources 3 and 5 are connected, is provided in an arrangement structure, wherein the input/output pins 9 and 11, whereto the power sources 3 and 5 are respectively connected, are arranged adjacent to both sides of the input/output pin 10, whereto the ground is connected, to the input/output pin 10. By this constitution, the lengths of the power current loops, which are formed between both the power terminals 9 and 11 and the grounding terminal 10, are both formed in the shortest length and the high-frequency component radiation to be emitted from the said loops is reduced. As the power current loops, a VDD power source 3 VDD power terminal 9 chip 1 grounding terminal 10 ground path and a VCC power source 5 VCC power terminal 11 chip 1 grounding terminal 10 ground path are formed.
申请公布号 JPS61288451(A) 申请公布日期 1986.12.18
申请号 JP19850129924 申请日期 1985.06.17
申请人 TOSHIBA CORP 发明人 NAKANISHI KOJI
分类号 H01L21/339;H01L23/495;H01L23/50;H01L23/64;H01L29/762 主分类号 H01L21/339
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