发明名称 SEMICONDUCTOR MEMORY CIRCUIT DEVICE
摘要 PURPOSE:To prevent the generation of the defective operation of a latch-up, etc. by turning a parasitic transistor ON by applying the potential of an N-type semiconductor substrate into a semiconductor memory circuit device up to maximum potential applied at that time by a semiconductor switch. CONSTITUTION:When the writing or erasing of a MNOS element 6 is not conducted, an N-type semiconductor substrate 1 is connected to VDD through a diode 20, thus clamping the potential of the N-type semi-conductor substrate 1 at VDD. Consequently, since a parasitic transistor 12 is reversely biassed, parasitic thyristors by parasitic transistors 11 and 12 are not turned ON even by any disturbance. When high voltage is applied to a P-type semiconductor region 2 in order to erase the MNOS element 6, high voltage is applied to the N-type semiconductor substrate 1 through an N<+> diffusion 8. The diode 20 is reversely biassed at that time, and power supplies are not short-circuited. High voltage is applied to the P-type semiconductor region 2 as a substrate for the MNOS element 6 through a P<+> diffusion 7.
申请公布号 JPS61287165(A) 申请公布日期 1986.12.17
申请号 JP19850130208 申请日期 1985.06.13
申请人 MITSUBISHI ELECTRIC CORP 发明人 AOKI KAZUO;KIJI AKIO;ASARI SEIICHIRO
分类号 G11C17/08;H01L21/8246;H01L21/8247;H01L27/08;H01L27/092;H01L27/10;H01L27/112;H01L29/788;H01L29/792 主分类号 G11C17/08
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