| 摘要 |
<p>PURPOSE:To reduce the size of a circuit sharply by storing an output timing correcting value in a memory together with an output signal line information to generate a timing signal in each n clocks. CONSTITUTION:The output timing correcting information 20-2 within n clocks to an output line in each n clocks is also stored in the memory 20 storing the output signal line information 20-1. The timing position of the line information 20-1 is corrected by a timing position correcting means 22 by using the correcting information 20-2 out of the output read from the memory 20 in each n clocks. The line information 20-1 corrected at its timing position is decoded by a decoder 23 to form a timing signal. Consequently, the number of circuits in the timing position correcting circuit can be reduced and a pulse width correcting circuit can be omitted. Thus, the size of the circuit can be sharply reduced.</p> |
