| 摘要 |
PURPOSE:To facilitate the processing while cutting down the production time per layer by a method wherein, while during a packaging process, the pad parts of each chip are exposed to lamination-bond each chip so that each chip may be laminated without increasing the bottom space of package. CONSTITUTION:Silicon integrated circuit chips 1A-1C with specific functions are respectively laminated to be bonded with one another. The bottom chip may be bonded to a die attachment 2 utilizing gold-silicon eutectic mixture or silver paste while the second and the third chips are preferably bonded with one another utilizing a bonding agent since they are not eutectic. The pad parts 3 of each chip coated with no bonding agent shall be exposed without fail to be wire-bonded on the necessary parts after the chips are laminated. A microcomputer can be produced very easily e.g. utilizing the chips 1A, 1B and 1C respectively as a large scale memory element, a central processing control element and a programming memory etc. Through these procedures, a semiconductor device with the maximum performance and high integration can be produced within a short time saving the long time for producing the conventional three dimensional elements. |
