发明名称 PULSE WIDTH GENERATION CIRCUIT
摘要 <p>PURPOSE:To form a desired pulse at a simple and optional time position by forming the 1st shift clock group having a period being n-time of a basic clock and the 2nd shift clock group having a period being m-times of the 1st shift clock group and inputting a selection signal to a selector. CONSTITUTION:To is a basic clock, a TA(TAO-TAi) has a period being n-times (i+1 times) of the basic clock To. The clock width of the TA is one cycle of the basic clock To. A TB has a period being m-times (j+1 times) of that of the TA and is a shift clock group whose phase is shifted by one cycle, and each clock width is one cycle to the TA. Further, i, j are decided optionally according to the condition of specifications. Shift clock groups TAO-TAi connect to selectors 7 and 9. Moreover, shift clock groups TBO-TAi connect to selectors 8 and 10.</p>
申请公布号 JPS61285817(A) 申请公布日期 1986.12.16
申请号 JP19850127327 申请日期 1985.06.12
申请人 FUJITSU LTD 发明人 HASHIMOTO SHUICHI
分类号 H03K5/135;H03K5/04;H03K5/05;H03K5/13 主分类号 H03K5/135
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