发明名称 ARITHMETIC PROCESSING UNIT
摘要 PURPOSE:To simplify a program by providing the program with a comparing instruction for setting a compared result in a register or a memory to be operands of multiplying and adding instructions respectively. CONSTITUTION:The 1st and 2nd operands to be compared are defined as an accumulator ACC and a prescribed address of a memory respectively and inputted and compared to/by an arithmetic unit ALU to set/reset a specific bit in a flag register F.Reg on the basis of the compared result. In this case, the operated result of the comparing instruction is set up in the least significant bit of the ACC, and when both the operands coincide with each other at the execution of the comparing instruction, only the least significant bit is made to ''1''. In case of inconsistency, all bits are turned to ''0''. After the comparison, the contents of the ACC are multiplied by A, the sum is added to the multiplied result and the contents of the ACC are stored. Thus, a JUMP instruction can be omitted.
申请公布号 JPS60169936(A) 申请公布日期 1985.09.03
申请号 JP19840024463 申请日期 1984.02.14
申请人 TOSHIBA KK 发明人 WASHIMI MASAHIKO
分类号 G06F7/00;G06F9/30;G06F9/305 主分类号 G06F7/00
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